m255
K4
z2
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
Z0 dD:/OneDrive/UVA/TeachingInternship/Nios2Computer/software/count_binary/obj/default/runtime/sim/mentor
valtera_avalon_sc_fifo
Z1 DXx6 sv_std 3 std 0 22 AD7iAPLo6nTIKk<N0eo=D3
Z2 !s110 1518979542
!i10b 1
!s100 AmIg@HKgzRdiLX?Qo8hRz3
I?DCG0M4S@c:`PR[Olg;9g1
Z3 VDg1SIo80bB@j0V0VzS_@n1
!s105 altera_avalon_sc_fifo_v_unit
S1
R0
Z4 w1518905355
8D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_sc_fifo.v
FD:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_sc_fifo.v
L0 21
Z5 OV;L;10.5b;63
r1
!s85 0
31
Z6 !s108 1518979542.000000
!s107 D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_sc_fifo.v|
!s90 -reportprogress|300|-sv|D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_sc_fifo.v|-L|altera_common_sv_packages|-work|nios2_cpu_data_master_limiter|
!i113 1
Z7 o-sv -L altera_common_sv_packages -work nios2_cpu_data_master_limiter
Z8 tCvgOpt 0
valtera_avalon_st_pipeline_base
R1
R2
!i10b 1
!s100 IZ246NSd;dW2a7WAUFMLa1
IfngaQ72aN=R>RmiFeZ^M=2
R3
!s105 altera_avalon_st_pipeline_base_v_unit
S1
R0
R4
8D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_st_pipeline_base.v
FD:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_st_pipeline_base.v
L0 22
R5
r1
!s85 0
31
R6
!s107 D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_st_pipeline_base.v|
!s90 -reportprogress|300|-sv|D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_avalon_st_pipeline_base.v|-L|altera_common_sv_packages|-work|nios2_cpu_data_master_limiter|
!i113 1
R7
R8
valtera_merlin_reorder_memory
R1
Z9 !s110 1518979541
!i10b 1
!s100 B]Q3gm[]eMNh?7KLoTHDO0
IiYUJTo0l`bYULRnDOfcch2
R3
Z10 !s105 altera_merlin_reorder_memory_sv_unit
S1
R0
R4
Z11 8D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_reorder_memory.sv
Z12 FD:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_reorder_memory.sv
L0 28
R5
r1
!s85 0
31
Z13 !s108 1518979541.000000
Z14 !s107 D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_reorder_memory.sv|
Z15 !s90 -reportprogress|300|-sv|D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_reorder_memory.sv|-L|altera_common_sv_packages|-work|nios2_cpu_data_master_limiter|
!i113 1
R7
R8
valtera_merlin_traffic_limiter
R1
R9
!i10b 1
!s100 0h4;DR_^c13j]SXILa7d?1
IBJKWC>21[9^C>^@eiBNf_1
R3
!s105 altera_merlin_traffic_limiter_sv_unit
S1
R0
R4
8D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_traffic_limiter.sv
FD:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_traffic_limiter.sv
L0 49
R5
r1
!s85 0
31
R13
!s107 D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_traffic_limiter.sv|
!s90 -reportprogress|300|-sv|D:/OneDrive/UVA/TeachingInternship/Nios2Computer/Nios2Computer/testbench/Nios2Computer_tb/simulation/submodules/altera_merlin_traffic_limiter.sv|-L|altera_common_sv_packages|-work|nios2_cpu_data_master_limiter|
!i113 1
R7
R8
vmemory_pointer_controller
R1
R9
!i10b 1
!s100 SnO4nm[FfBVF>D;LEgjzR2
I38Z5CeJD29X79lIT;gi=J0
R3
R10
S1
R0
R4
R11
R12
L0 185
R5
r1
!s85 0
31
R13
R14
R15
!i113 1
R7
R8
